The present invention relates to semiconductor fabrication technology and in particular to a resistance-reduced semiconductor device fabricated by a self-aligned metallized (SAM) process.
Along with high integration, high performance, and low power consumption in semiconductor devices, a low resistance gate material is required to reduce gate length in transistors and memory cells through formation of fine patterns and to improve device characteristics. The thickness of a gate insulating layer gradually decreases to increase a channel current in a transistor and a memory cell due to low power consumption. In order to prevent short channel effects caused by the reduction of the gate length in a transistor and secure a margin against punchthrough, the sacrificial resistance, for example, sheet resistance and contact resistance of a source/drain region, must be reduced when forming a shallow source/drain.
Therefore, integrated circuits (ICs) fabrication have been fabricated by a salicide (self-aligned silicide) process in which a silicide is formed on the surfaces of a gate and a source/drain region to thereby reduce the resistivity of the gate and the sheet resistance and contact resistance of the source/drain region. The salicide process indicates selective formation of a silicide region only on a gate and a source/drain region. The silicide region is formed of titanium silicide (TiSi2) or materials of the group-VIII silicides (e.g., PtSi2, PdSi2, CoSi2, and NiSi2).
Nevertheless, process issues such as agglomeration or bubbles formed along a polysilicon or silicon boundary of a device do exist in the metal silicide layer having lowered sheet resistance formed by the conventional salicide process through reacting refractory metal with the silicon, and dislocation and discontinuity of boundary structures can be found therein due to poor thermal stability under high annealing temperature. Thus, an issue such as electrical disconnection or increased sheet resistance caused by the agglomeration of the metal silicide occurs and degrades reliability of the semiconductor device.
Hence, there is a need for a better resistance-reduced structure to prevent possible degradation of the metal silicide layer thereof.